A data access/exchange function is a most important and basic function of an electronic apparatus. One of important issues researched by modern circuit designers is how to realize high-speed data access/exchange and ensure accuracy of data exchange via simple, low-cost and small size configuration circuits.
Generally, a digital data source, e.g., a memory, is used for transmitting and receiving data signals according to a data strobe signal. A data access apparatus samples data signals according to the data strobe signal. For example, when a data receiving circuit of the data access apparatus accesses a DDR memory, which not only provides a data signal carrying data, but also provides an in-phase data strobe signal. Transitions of the data strobe signal are aligned with those of data signal. In prior arts, the data receiving circuit of the data access apparatus triggers sampling of the data signal according to the transitions (i.e., rising edges and/or falling edges) of the external data strobe signal. Although the data strobe signal and the data signal are in-phase, data of the data signals are preferably accessed when the data signal between two transitions is sampled. In other words, a preferred sampling timing of the data signal is that there is a phase difference of 90 degrees between rising/falling edges of the data signal and those of the data strobe signal. Therefore, a delay locked loop (DLL) is additionally configured in a conventional data receiving circuit to delay the external data strobe signal (i.e., the data strobe signal provided by the DDR memory) by 90 degrees, and the delayed data strobe signal triggers sampling of the data signal.
The conventional DLL is formed by a two-stage master-slave DLL comprising circuits having extremely complicated structures and operations, requiring large size layout area and consuming more system resources (e.g., power) when the circuits are operated. In addition, the data strobe signal is not a free-running clock. When the data signal carries data bits, transitions of the data bits are marked by level transitions of the data strobe signal. When the data signal does not carry data bits, the level of the data strobe signal stays unchanged. Therefore, when the data signal begins carrying data bits, the conventional DLL needs to immediately overcome a transition status caused by variation of the data strobe signal and stabilize operations to stably delay the data strobe signal by 90 degrees in real-time. However, as requirements of high-speed data access/exchange increase day by day, the data transmission frequency become faster and faster, and the DLL become harder and harder to respond and is only stabilized after several cycles. During the transition period, the conventional data receiving circuit cannot accurately samples actual content of the data bits. For the DDR memory that continuously transmits the data bits via a burst mode, the foregoing disadvantages become more obvious.